Summary

This PR migrates SecAct's optional accelerator integration from the historical pair of RidgeFast (CPU) + RidgeCuda (GPU) R packages to a single unified FlashReg R package that ships both backends — same C + OpenMP kernel for CPU, same CUDA kernel for GPU, shared MT19937 permutation seam, single `configure` script that auto-detects `nvcc`.

Users get a simpler install story (one optional package instead of two) and the same bit-equivalence guarantee.

What changed

• `DESCRIPTION` — `Suggests:` drops `RidgeFast` + `RidgeCuda`, adds `FlashReg`.

• `R/ridge.R` — `.resolve_backend` / `.ridge_dispatch` / `.ridge_batch_dispatch` now delegate to `FlashReg::ridge()` with backend mapping:

  SecAct backend	FlashReg backend
  `"gpu"`	`"cuda_native"`
  `"cpu-fast"`	`"omp"`
  `"cpu-pure"`	(in-house `.ridge_pureR`, unchanged)

  Legacy SecAct backend names are preserved for backward compatibility — any downstream code that pins `backend="gpu"` or `backend="cpu-fast"` keeps working without changes.

  `.ridge_pureR_batch` gains an optional `kernel_fn=` argument so the HDF5-streaming column-batch loop is now shared between FlashReg and the pure-R fallback.

• `R/activity.R` — `backend` parameter docstring updated to recommend FlashReg.

• `tests/testthat/test-backend-parity.R` — `skip_if_not_installed("FlashReg")`.

• `vignettes/accelerator.Rmd` — RidgeFast + RidgeCuda installation links replaced with FlashReg link and a short explanatory note about the consolidation.

Why one package

FlashReg is the same kernel sources as RidgeFast + RidgeCuda, just reorganized:

• `src/ridge_omp.c` <— RidgeFast's `src/main.c` (R headers stripped, ABI cleaned up)
• `inst/cuda/ridge_cuda.cu` <— RidgeCuda's `src/ridge_cuda.cu` verbatim
• `configure` detects nvcc at install time → conditional CUDA build (CPU-only build is the default fallback). Honors `FLASHREG_NO_CUDA=1` env var for CI / build-farm forced-CPU installs.
• Runtime device probe via `FlashReg::cuda_available()` — returns FALSE when no usable GPU is detected at load time even on machines where the toolkit was present at build time.

Verification

Cross-backend parity verified end-to-end at the double-precision floor.

Through SecAct's dispatcher (FlashReg 0.1.0 installed, `n=60, p=10, m=4, nrand=200, seed=0`):

```
backend='cpu-fast' (-> FlashReg backend='omp')
vs backend='cpu-pure':
max|delta beta| = 3.6e-17
max|delta z| = 6.7e-16
exact pvalue match
```

End-to-end parity ledger across all backends:

Backward compatibility

• Legacy backend names (`"gpu"`, `"cpu-fast"`, `"cpu-pure"`) are preserved.
• Pure-R fallback unchanged — installing without FlashReg works exactly as before.
• The published `SecAct.activity.inference` API is unchanged.

Open coordination

This depends on FlashReg being published at `data2intelligence/FlashReg` so `Suggests: FlashReg` resolves. Happy to coordinate the release order with you — FlashReg is ready to push when the repo is created.

Test plan

• `R CMD INSTALL SecAct` succeeds with the new `Suggests`.
• `SecAct:::.ridge_dispatch(..., backend="cpu-fast")` returns bit-equivalent output to `backend="cpu-pure"` when FlashReg is installed.
• Pure-R fallback still works when FlashReg is not installed.
• Run the full `tests/testthat/` suite on a clean install with and without FlashReg (CI will pick this up once merged).